Brief Introduction
VLSI - Essential timing checksDescription
Static timing analysis comprises broadly for timing checks, constraints and library. Having all of them in a single course makes it bulky. So we decided to have it in 3 parts and this is part I - Essential timing checks. This course will give an eagle's eye to every timing check that is being performed in current industries for sign-off. This will also introduce you to basic terminologies for timing, which are needed for advanced courses on STA.
Timing comes at every step of physical design flow, but in this course, we primarily focus on signoff timing i.e. looking into each and every corner of design for any timing violations
The course starts from very basic and gradually takes you to an advanced level at an intermediate pace. So no questions on you missing any details
Hope you enjoy learning this course in the same way we enjoyed making them.
Happy Learning !!
Requirements
- Requirements
- Knowledge on physical design flow will be good to have
- If not, no worries. This course will take you from basics to advanced in a structured manner and create an interest in physical design world
Kunal Ghosh
4.3 Raiting
VSD - Circuit Design & SPICE Simulations - Part 1
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Learn how things got started in VLSI So, you are a professional in VLSI, doing tons of tapeouts and accurate timing analysis....
VSD - Static Timing Analysis - I
- 4.3
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VLSI - Essential timing checks Static timing analysis comprises broadly for timing checks, constraints and library. Having all of them in a single course makes it bulky....
VSD - Static Timing Analysis - II
- 4
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VLSI - Analyse your chip timing for free In static timing analysis - part 1 course, we introduced you to basic and essential timing checks, like cppr, gba, pba, etc....
