FPGA Turbo Series - Implementing a UART

  • 0.0
1.5 hours on-demand video
$ 12.99

Brief Introduction

Develop a fully functional UART from start to finish and implement on your own FPGA development board

Description

This course will explain how the Universal Asynchronous Receiver Transmitter (UART) protocol can be used to transmit and receive information. The UART protocol structure is explained in great detail with many visual representations to help the students understand how a UART works. Once the UART protocol has been sufficiently explained to the students, they will then be guided through the FPGA design and development process in order to implement a fully functional UART on their FPGA development boards. This fully functional UART will be able to accept commands received over the UART serial port and act upon these commands. These actions will include being able to individually select which LED's are on and which ones are off, as well as being able to set the number displayed on the 7 segment display.

Students will be provided with VHDL design files that can be used as starting points for their UART design. Working with the provided design files and using the lectures as references the students will implement a fully functional UART on their development boards. The students will get to use Xilinx's development tools for the design and debugging of their UART implementations.

This course is geared towards students who have been exposed to VHDL, FPGA's, as well as a basic understanding of digital circuits. This is a great supplement to any engineering student who wants to improve upon their hardware design skills before entering the workforce. This course is also great for anyone who is currently employed in the field engineering. Also any electronic hobbyist would benefit greatly from this course!

Upon completing this course students will have all the necessary design files to implement a UART on virtually any FPGA with minimal modifications. Beings that the students will be designing and debugging their own code they will have very detailed knowledge of how this design works and will easily be able to adapt it so that they can add support for many more commands!


Requirements

  • Requirements
  • Download and install Xilinx Vivado Design Suite.
  • Download and install TeraTerm or any other type of terminal emulator. There are instructions on how to install TeraTerm included in this course if you happen to get stuck.
  • Basic understanding or exposure to VHDL.
  • Basic understanding of digital circuits.
  • Familiar with what a Field Programmable Gate Array (FPGA) is.
$ 12.99
English
Available now
1.5 hours on-demand video
Jordan Christman
Udemy

Instructor

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